HFSS 3D Layout: SIwave DCIR analysis in HFSS 3D Layout#

This example shows how you can use configure HFSS 3D Layout for SIwave DCIR analysis.

import os
import tempfile
import pyaedt

Set AEDT version#

Set AEDT version.

aedt_version = "2024.1"

Configure EDB for DCIR analysis#

Copy example into temporary folder

temp_dir = tempfile.gettempdir()
dst_dir = os.path.join(temp_dir, pyaedt.generate_unique_name("pyaedt_dcir"))
os.mkdir(dst_dir)
local_path = pyaedt.downloads.download_aedb(dst_dir)

Load example board into EDB

appedb = pyaedt.Edb(local_path, edbversion=aedt_version)

Create pin group on VRM positive pins

gnd_name = "GND"
appedb.siwave.create_pin_group_on_net(
    reference_designator="U3A1",
    net_name="BST_V3P3_S5",
    group_name="U3A1-BST_V3P3_S5")
('U3A1-BST_V3P3_S5', <pyedb.dotnet.edb_core.edb_data.sources.PinGroup object at 0x00000279F451C040>)

Create pin group on VRM negative pins

appedb.siwave.create_pin_group_on_net(
    reference_designator="U3A1",
    net_name="GND",
    group_name="U3A1-GND")
('U3A1-GND', <pyedb.dotnet.edb_core.edb_data.sources.PinGroup object at 0x00000279F451C4F0>)

Create voltage source between VRM positive and negative pin groups

appedb.siwave.create_voltage_source_on_pin_group(
    pos_pin_group_name="U3A1-BST_V3P3_S5",
    neg_pin_group_name="U3A1-GND",
    magnitude=3.3,
    name="U3A1-BST_V3P3_S5"
)
True

Create pin group on sink component positive pins

appedb.siwave.create_pin_group_on_net(
    reference_designator="U2A5",
    net_name="V3P3_S5",
    group_name="U2A5-V3P3_S5")
('U2A5-V3P3_S5', <pyedb.dotnet.edb_core.edb_data.sources.PinGroup object at 0x00000279DB62A830>)

Create pin group on sink component negative pins

appedb.siwave.create_pin_group_on_net(
    reference_designator="U2A5",
    net_name="GND",
    group_name="U2A5-GND")

# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# Create place current source between sink component positive and negative pin groups
appedb.siwave.create_current_source_on_pin_group(
    pos_pin_group_name="U2A5-V3P3_S5",
    neg_pin_group_name="U2A5-GND",
    magnitude=1,
    name="U2A5-V3P3_S5"
)
True

Add SIwave DCIR analysis

appedb.siwave.add_siwave_dc_analysis(name="my_setup")
<pyedb.dotnet.edb_core.edb_data.siwave_simulation_setup_data.SiwaveDCSimulationSetup object at 0x00000279DB62BD30>

Save and close EDB#

Save and close EDB.

appedb.save_edb()
appedb.close_edb()
True

Analysis DCIR in AEDT#

Launch AEDT and import the configured EDB and analysis DCIR

desktop = pyaedt.Desktop(aedt_version, non_graphical=False, new_desktop_session=True)
hfss3dl = pyaedt.Hfss3dLayout(local_path)
hfss3dl.analyze()
hfss3dl.save_project()
True

Get element data#

Get current source

current_source = hfss3dl.get_dcir_element_data_current_source(setup="my_setup")
print(current_source)

# ~~~~~~~~~~~~~~~~~~~
# Get via information

via = hfss3dl.get_dcir_element_data_via(setup="my_setup")
print(via)
               Voltage
U2A5-V3P3_S5  3.294553
                             X
J1-6<BOTTOM,TOP>      0.003632
J1A6-3<BOTTOM,TOP>    0.034595
J1B2-2<BOTTOM,GND>    0.007493
J1B2-2<GND,TOP>       0.007493
J2A1-4<BOTTOM,TOP>    0.026975
...                        ...
via_4873<GND,TOP>     0.056947
via_4874<BOTTOM,GND>  0.086106
via_4874<GND,TOP>     0.086106
via_4875<BOTTOM,GND>  0.082550
via_4875<GND,TOP>     0.082550

[883 rows x 1 columns]

Get voltage#

Get voltage from dcir solution data

voltage = hfss3dl.get_dcir_solution_data(setup="my_setup", show="Sources", category="Voltage")
print({expression: voltage.data_magnitude(expression) for expression in voltage.expressions})
{'SeriesRV(U3A1-BST_V3P3_S5)': [1.000632290113], 'V(U2A5-V3P3_S5)': [3294.553400696]}

Close AEDT#

desktop.release_desktop()
True

Total running time of the script: (2 minutes 37.022 seconds)

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