create_lumped_port#

Trace.create_lumped_port(reference_layer, opposite_side=False, port_name=None, axisdir=None)[source]#

Create a parametrized lumped port.

Parameters:

reference_layerclass:ansys.aedt.core.modeler.advanced_cad.stackup_3d.Layer3D: Reference layer, which is the ground layer in most cases.
opposite_sidebool, optional: Change the side where the port is created.
port_namestr, optional: Name of the lumped port.
axisdirint or ansys.aedt.core.application.analysis.Analysis.AxisDir, optional: Position of the port. It should be one of the values for Application.AxisDir, which are: XNeg, YNeg, ZNeg, XPos, YPos, and ZPos. The default is Application.AxisDir.XNeg.

Returns:

bool: True when successful, False when failed. True when successful, False when failed.

Examples

>>> from ansys.aedt.core import Hfss
>>> from ansys.aedt.core.modeler.advanced_cad.stackup_3d import Stackup3D
>>> hfss = Hfss(new_desktop=True)
>>> my_stackup = Stackup3D(hfss, 2.5e9)
>>> gnd = my_stackup.add_ground_layer("gnd")
>>> my_stackup.add_dielectric_layer("diel1", thickness=1.5, material="Duroid (tm)")
>>> top = my_stackup.add_signal_layer("top")
>>> my_trace = top.add_trace(line_width=2.5, line_length=90, is_electrical_length=True)
>>> my_stackup.resize_around_element(my_trace)
>>> my_trace.create_lumped_port(gnd)
>>> my_trace.create_lumped_port(gnd, opposite_side=True)